Redefining Physical Intelligence.
The most efficient chip for edge devices, for applications constrained by power, latency, or data security & privacy.
Every inference produces the same answer, every time. No analog drift, no spiking variance.
Weights live where the math happens. No external memory, no off-chip bandwidth bottleneck. Energy goes into computation.
Mature process. No exotic memristors, no custom fab. Predictable yield, predictable cost, predictable supply.
One chiplet design. 1x for hearing aids. 4x for cobots. 8x for drones. Modular by composition.
Conventional architectures spend most of their energy moving data between memory and compute. Digital in-memory compute eliminates this.
Four core operators with deep silicon and physical-AI experience. Across prior tenures at AMD, ARM, Demant, and global research institutes, the team has shipped real silicon at scale.
For engineering partnerships, design-ins, or technical due diligence, get in touch directly.